IBM's 0.7nm Nanostack Chip Breaks the Sub-1nm Barrier

Thu, 25 Jun 2026 23:41:17 +0800

IBM’s 0.7nm Nanostack Chip Breaks the Sub-1nm Barrier

IBM has announced a major milestone in semiconductor technology with the introduction of the world’s first sub-1nm chip architecture. Built on a 0.7nm (7-angstrom) process node, the experimental chip integrates nearly 100 billion transistors into a die approximately the size of a fingernail, demonstrating that traditional transistor scaling still has room to advance despite approaching physical limits.

0.7nm on KAD

IBM's 0.7nm Nanostack Chip Breaks the Sub-1nm Barrier