AMD Launches Versal RF Adaptive SoCs for Advanced Radar & EW

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AMD Introduces Versal RF Adaptive SoCs for Radar and Electronic Warfare

AMD announced the initial shipment of its Versal RF adaptive SoC family, a new class of devices that tightly integrate RF data converters with on-chip compute for real-time signal processing. The devices combine RF-sampling ADCs, high-speed DACs, hardened DSP blocks, and AI Engines in a single chip, aiming to reduce board count and power consumption in modern embedded RF systems.

Target applications include phased array radar, Electromagnetic Spectrum Operations (EMSO), test and measurement, and space communication workloads using LDPC decoding. AMD confirmed that engineering samples of the VR1602 are now shipping, while VR1652 availability is planned for Q1 2026.

According to AMD, Versal RF devices deliver up to 18 GHz input/output bandwidth, supporting configurations such as:

Up to eight 14-bit, 32 GSPS RF ADCs
Up to sixteen 14-bit, 8 GSPS RF ADCs
Up to sixteen 14-bit, 16 GSPS RF DACs

These capabilities enable wideband spectrum capture and transmission on a single chip.

The platform includes hardened IP blocks for FFT/IFFT, channelization, resampling, LDPC decoding, and FIR filtering, with additional flexibility provided by the AI Engine (AIE) and DSP58 resources for customized signal processing pipelines.

AMD Versal RF Series Products
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(1) Overview
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The Versal RF series provides a SWaP-optimized, single-chip architecture capable of direct wideband digital sampling of Ku-band signals while offering extensive on-chip DSP throughput for low-latency, edge-level signal analysis.

Modern radar, spectrum operations, and test equipment require wide bandwidth, high sample rates, and high resolution, pushing beyond traditional FPGA architectures. The Versal RF series addresses this with a heterogeneous compute model that blends:

Hardened DSP and RF signal-processing IP
AI Engines (AIE) for parallel compute
Programmable logic for customization

This architecture can deliver up to 80 TOPS of compute within a single SoC.

The Versal RF lineup introduces the industry’s first monolithically integrated 14-bit, 32 GSPS RF-ADC on adaptive logic. Competing platforms require significantly more FPGA resources to reach comparable capability—leading to as much as 3× larger package size.

By using hardened IP instead of soft-IP implementations on FPGA fabric, Versal RF devices can reduce dynamic power consumption by up to 80%, making them an ideal choice for systems with tight SWaP constraints.

(2) Core Highlights
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Precise Wideband Signal Characterization
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Up to eight 14-bit, 32 GSPS RF-ADCs with integrated DUC/DDC hard IP
18 GHz instantaneous input bandwidth
Up to sixteen 14-bit, 16 GSPS RF-DACs for wideband RF output

Massive Digital Signal Processing Capability
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Hardened DSP IP blocks supporting FFT/iFFT, channelizers, polyphase resamplers, and LDPC decoders (including DVB-S2/S2X)
Combined AIE + DSP58 + hard IP pipeline delivering up to 80 TOPS
Supports deployment of complete, single-device solutions for advanced RF systems

Size, Weight, and Power (SWaP) Optimization
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Hard IP can reduce dynamic power by up to 80% vs. soft IP
Monolithic integration reduces area and power associated with high-speed interfaces
Lower thermal output enables smaller, lighter system designs