AMD Versal Premium Gen 2 MoP: Bringing Memory-on-Package to Adaptive SoCs
AMD has officially expanded its adaptive computing portfolio with the launch of the Versal Premium Gen 2 family, introducing a major architectural milestone: the company’s first Memory-on-Package (MoP) implementation in the Versal lineup.
The flagship Versal Premium Gen 2 MoP integrates 32GB of LPDDR5X memory directly inside the package, delivering high bandwidth, lower power consumption, a dramatically smaller footprint, and the long-term availability demanded by industrial and embedded applications.
Rather than pursuing the highest possible bandwidth with High Bandwidth Memory (HBM), AMD has taken a different approach—one focused on deployment longevity, ruggedness, simplified system design, and predictable supply chains.
Why AMD Is Moving Beyond HBM #
The semiconductor memory market has changed dramatically in recent years.
Explosive demand from AI data centers has absorbed much of the world’s advanced memory production, driving prices upward and reducing availability for many embedded and industrial applications.
Meanwhile, edge AI, industrial automation, aerospace systems, telecommunications, and machine vision continue demanding:
- Larger memory capacities
- Higher bandwidth
- Smaller hardware footprints
- Lower power consumption
- Long product lifecycles
- Reliable operation across harsh environments
Historically, HBM addressed many performance requirements.
AMD previously launched:
- Virtex UltraScale+ HBM FPGA (2018) with 16GB HBM delivering up to 460 GB/s bandwidth.
- Versal HBM Adaptive SoC (2022) featuring 32GB HBM and up to 840 GB/s bandwidth.
While ideal for high-performance computing and AI accelerators, HBM introduces several drawbacks for embedded deployments:
- Short commercial lifecycles
- Limited long-term supply guarantees
- Difficult industrial temperature certification
- Higher power consumption
- Greater cooling requirements
- More expensive packaging technologies
For industries expecting hardware deployments lasting well over a decade, these limitations have become increasingly significant.
Three Deployment Options for Different System Requirements #
The Versal Premium Gen 2 family offers three memory configurations, allowing developers to balance capacity, bandwidth, board space, and system flexibility.
External DDR5 Configuration #
Model: VSVA3224
This configuration pairs the adaptive SoC with conventional DDR5 memory installed on the PCB or connected through up to four RDIMM slots.
Key specifications include:
- DDR5 speeds up to 6400 MT/s
- Maximum memory capacity exceeding 512GB
- Ideal for systems where physical space is less constrained
- Optimized for applications requiring very large memory pools
External LPDDR5X Configuration #
Model: 2VP3602
This version places LPDDR5X packages alongside the adaptive SoC on the printed circuit board.
Specifications include:
- Up to eight LPDDR5X packages
- Total memory capacity of 32GB
- 32-bit single-channel interface
- Memory operating at 8533 MT/s
- Memory bandwidth reaching 270 GB/s
This configuration offers a compact solution while maintaining board-level memory flexibility.
Memory-on-Package (MoP) #
Model: 2VP3622
The flagship MoP version integrates memory directly into the processor package.
Highlights include:
- 32GB LPDDR5X
- Four integrated memory dies
- 64-bit dual-channel interface
- 9000 MT/s operating speed
- Up to 288 GB/s memory bandwidth
By integrating memory inside the package, AMD significantly reduces board complexity while improving signal integrity and overall system efficiency.
Upgraded Connectivity for Modern Workloads #
Beyond memory innovations, the second-generation platform expands its high-speed I/O capabilities.
Building on the previous Versal Premium architecture, AMD adds support for:
- PCIe 6.0
- CXL 3.1 operating at 64 GT/s
- 128G GTM2 SerDes
- DDR5 and LPDDR5X memory
- Memory pooling technologies
The platform also introduces a third PCIe controller, supplementing the existing dual PCIe 6.0 ×8 interfaces.
When paired with AMD EPYC processors, PCIe 6.0 and CXL 3.1 enable faster memory sharing and higher-throughput data movement for demanding embedded AI and networking applications.
Simplifying Hardware Design with Memory-on-Package #
One of the biggest engineering advantages of the MoP architecture is design simplification.
The package integrates:
- The adaptive SoC die
- LPDDR5X memory controller
- Four LPDDR5X memory dies
Because the memory interface is pre-qualified inside the package, engineers no longer need to route high-speed LPDDR traces across the PCB.
Benefits include:
- Simplified PCB layout
- Reduced layer count
- Improved signal integrity
- Lower validation complexity
- Shorter design cycles
- Reduced development costs
The extremely short 0.4 mm package-level interconnect between processor and memory also minimizes signal loss while improving electrical efficiency.
A Different Packaging Strategy Than HBM #
The architectural differences between Versal HBM and Versal Premium MoP are substantial.
Versal HBM relies on advanced packaging technologies such as:
- Stacked Silicon Interconnect Technology (SSIT)
- Chip-on-Wafer-on-Substrate (CoWoS)
- Silicon interposers connecting logic and HBM stacks
By comparison, Versal Premium MoP directly connects the adaptive SoC and LPDDR5X memory through the package substrate.
This approach removes the need for costly interposers while offering:
- Lower manufacturing complexity
- Better scalability
- Improved supply flexibility
- Reduced production costs
Cutting Board Space by 60% #
The compact packaging delivers a dramatic reduction in overall system footprint.
A traditional LPDDR5X implementation occupies approximately:
$$ 107 × 74 mm = 7,918 mm² $$
The Memory-on-Package solution measures only:
$$ 55 × 57.5 mm = 3,162.5 mm² $$
This represents roughly a 60% reduction in board area.
The reclaimed space can accommodate:
- Additional networking hardware
- PCIe expansion cards
- Smaller enclosure designs
- Higher system integration density
Developers also avoid much of the work associated with:
- Memory architecture design
- Component selection
- Signal integrity analysis
- Power integrity validation
- Memory qualification
- Board-level verification
AMD estimates these advantages can shorten development timelines by several months.
Built for Long-Term Industrial Deployments #
Unlike many high-performance computing products, Versal Premium Gen 2 MoP is designed for applications expected to remain in service for well over a decade.
Key reliability features include:
- Operating temperatures from -40°C to 110°C
- JEDEC-compliant LPDDR5X memory
- 15-year product lifecycle support
- Improved resistance to supply chain disruptions
- Greater long-term component availability
These characteristics make the platform particularly attractive for industries where hardware replacement cycles are measured in years rather than months.
Integrated Security Enhancements #
The Memory-on-Package architecture also improves physical security.
Because memory resides inside the package, external probing becomes significantly more difficult.
Additional security capabilities include:
- PCIe 6.0 Integrity and Data Encryption (IDE)
- Integrated DDR memory encryption
- Hardened 400G cryptographic engine
- Secure high-bandwidth data processing
- Hardware-level protection without consuming programmable logic resources
These features help safeguard both stored data and communications without sacrificing performance.
Target Applications #
AMD positions Versal Premium Gen 2 MoP for a broad range of embedded and industrial markets.
Audio, Video, and Broadcasting #
The platform supports demanding media workloads including:
- Multi-channel video processing
- Real-time AI video analytics
- ST 2110 IP video
- Advanced camera systems
- Broadcast switching
Test and Measurement #
Its compact footprint makes it particularly well suited for:
- PXI and PXIe instrumentation
- Oscilloscopes
- Signal generators
- Spectrum analyzers
- Wireless testing platforms
- Arbitrary waveform generators (AWGs)
The combination of PCIe 6.0, high-speed transceivers, and compact packaging enables future-ready instrumentation with faster development cycles.
Availability #
AMD’s rollout schedule includes:
| Milestone | Timeline |
|---|---|
| Early documentation | Available now |
| Standard Versal Premium Gen 2 sampling | Available now |
| Vivado Beta support (standard models) | Available now |
| Vivado official MoP support | Q3 2026 |
| MoP engineering samples | Q4 2026 |
| Standard model mass production | Q4 2026 |
| MoP volume production | Q3 2027 |
Because the MoP and standard variants share the same underlying adaptive SoC silicon, much of the software ecosystem and documentation remains common across the product family.
Final Thoughts #
The Versal Premium Gen 2 MoP represents more than simply another adaptive SoC release—it signals AMD’s evolving strategy for embedded computing.
Rather than chasing maximum memory bandwidth through HBM, AMD has prioritized what many industrial customers value most: predictable long-term supply, simplified hardware development, compact system design, lower power consumption, and dependable operation across demanding environments.
By combining 32GB of integrated LPDDR5X, PCIe 6.0, CXL 3.1, a 60% smaller footprint, and a 15-year lifecycle, the Versal Premium Gen 2 MoP offers a compelling platform for next-generation industrial AI, communications, aerospace, broadcasting, and high-performance embedded systems where longevity and reliability are every bit as important as raw performance.