Intel Taps TSMC 2nm for Nova Lake and Razor Lake CPUs
Intel is reportedly preparing to use TSMC’s 2nm process family across two consecutive desktop CPU generations, potentially reshaping the competitive landscape for advanced foundry capacity.
The upcoming Nova Lake generation is expected to combine Intel’s own 18A process with TSMC’s N2P, while its successor, Razor Lake, is reportedly set to use TSMC’s higher-performance N2X technology alongside Intel’s own manufacturing nodes.
The move would represent a significant change in Intel’s manufacturing strategy. Rather than relying exclusively on its internal process roadmap, Intel appears increasingly willing to combine its own leading-edge nodes with external foundry capacity to scale production.
For AMD, which also depends heavily on TSMC for advanced CPU manufacturing, Intel’s expanded allocation could make an already competitive wafer-supply environment even tighter.
🏭 Intel Expands TSMC 2nm Usage Across Two Generations #
Intel’s Nova Lake processors are reportedly scheduled to enter mass production around January 2027.
Earlier expectations suggested that Nova Lake would rely primarily on Intel’s 18A process. More recent information instead points to a split manufacturing strategy involving both Intel 18A and TSMC N2P.
The same strategy is reportedly expected to continue with Razor Lake.
While Nova Lake would use TSMC N2P for part of its production, Razor Lake is expected to adopt N2X, a performance-oriented variant of TSMC’s second-generation 2nm technology.
N2P and N2X target different performance requirements #
TSMC’s N2 platform moves from traditional FinFET transistors to nanosheet transistor architecture, providing a foundation for improved performance and energy efficiency.
N2P is positioned as an enhanced version of the standard N2 process, while N2X is designed for applications requiring particularly aggressive performance characteristics.
High-frequency CPUs, AI accelerators, and HPC processors are natural candidates for such a process.
For Intel, access to these nodes could provide additional flexibility when balancing performance targets, production volume, and internal manufacturing capacity.
🧠 Nova Lake Introduces a Large bLLC Cache Architecture #
Nova Lake is also expected to introduce a new bLLC, or Big Last-Level Cache, architecture.
The design appears intended to compete directly with AMD’s X3D processors, which use large amounts of cache to improve performance in latency-sensitive workloads such as gaming.
Reported cache configurations include:
| Nova Lake Configuration | Reported Core Count | Reported Cache |
|---|---|---|
| Top-tier configuration | 52 cores | Up to 288 MB |
| Mainstream configuration | 28 cores | Up to 144 MB |
| Core Ultra 9 4950K | 28 cores | Up to 144 MB |
If these specifications materialize, Nova Lake would significantly increase Intel’s cache capacity compared with many current desktop processors.
Core Ultra 9 4950K reportedly uses a hybrid 28-core design #
The Core Ultra 9 4950K, reportedly part of the Nova Lake-S family, is expected to feature:
- 8 Performance cores
- 16 standard Efficiency cores
- 4 Low-Power Efficiency cores
- 28 total cores
The combination illustrates Intel’s continued emphasis on heterogeneous CPU architectures.
Rather than treating all 28 cores as equivalent, Nova Lake is expected to combine different core types to balance single-thread performance, multithreaded throughput, background processing, and power efficiency.
📊 Core Ultra 9 4950K Benchmark Results Also Leak #
CPU-Z benchmark information associated with the Core Ultra 9 4950K has reportedly surfaced.
The leaked results indicate approximately:
- 1,000 points in single-thread performance
- 20,000 points in multi-thread performance
These figures would represent strong performance if they are eventually validated using production hardware and standardized testing conditions.
However, early benchmark results should be treated cautiously.
Engineering samples can operate with unfinished firmware, different power limits, preliminary microcode, or non-final clock configurations. CPU-Z screenshots can also be manipulated, making independent hardware verification essential.
Consequently, the reported numbers are best viewed as an early indication rather than definitive Nova Lake performance data.
📱 Mobile Cache Strategy May Shift to Razor Lake #
The Nova Lake architecture could also introduce a distinction between desktop and mobile cache implementations.
Current reports suggest that notebook versions of Nova Lake may not receive dedicated mobile cache-focused SKUs.
Instead, Intel could defer that strategy until the Razor Lake-HX generation.
If accurate, this would indicate that Intel is sequencing its large-cache strategy differently across product segments rather than immediately applying the same architecture to desktop and mobile processors.
The decision could reflect differences in thermal budgets, package constraints, battery requirements, and the workloads targeted by each platform.
⚔️ Intel’s TSMC Demand Could Increase AMD’s Supply Pressure #
The manufacturing implications may be even more important than the CPU specifications.
TSMC’s leading-edge capacity is already highly sought after by semiconductor companies across multiple markets.
AMD relies heavily on TSMC for its advanced CPU and GPU products, while Apple, NVIDIA, Qualcomm, MediaTek, and other major customers also compete for advanced-node capacity.
If Intel reserves meaningful volumes of TSMC’s 2nm capacity for both Nova Lake and Razor Lake, the competitive environment could become even more challenging.
Intel’s external sourcing changes the foundry equation #
Intel has historically emphasized internal manufacturing as a strategic advantage.
Using TSMC for portions of multiple consecutive CPU generations suggests a more flexible approach: Intel can combine internal process technology with external foundry capacity when doing so improves production scalability or product competitiveness.
This strategy also gives Intel an additional lever when managing manufacturing risk.
If Intel 18A capacity is insufficient for a particular product generation, external TSMC capacity can potentially absorb part of the demand.
However, the trade-off is increased competition for the same leading-edge wafer resources sought by AMD and other fabless semiconductor companies.
🔧 Intel 18A Capacity Remains a Critical Variable #
The decision to use TSMC for portions of Nova Lake and Razor Lake does not necessarily mean Intel 18A is technically incapable of producing these processors.
A mixed-foundry strategy can be driven by several factors, including:
- Production capacity
- Manufacturing yield
- Product segmentation
- Cost optimization
- Time-to-market requirements
- Packaging constraints
- Risk diversification
- Demand forecasting
Nevertheless, the reported outsourcing plan suggests Intel’s internal capacity may not be sufficient—or may not be economically optimal—to handle the complete production requirements of these generations.
For a company attempting to expand its foundry business while simultaneously producing its own CPUs, managing internal and external capacity will be a major strategic challenge.
📦 Advanced Foundry Capacity Becomes a Competitive Asset #
The Nova Lake and Razor Lake manufacturing strategy highlights a broader shift in the CPU industry.
Performance is no longer determined solely by microarchitecture.
Access to advanced process technology, packaging capacity, high-bandwidth memory, advanced substrates, and sufficient wafer allocation can directly influence a company’s ability to bring competitive products to market.
Intel’s willingness to use TSMC’s 2nm technology for two consecutive generations demonstrates how strategically important external foundry capacity has become—even for a company with its own leading-edge manufacturing roadmap.
For AMD, the implications are equally significant.
AMD’s product roadmap continues to depend heavily on TSMC, meaning competition for advanced-node allocation can affect both inventory planning and product scaling.
🎯 Nova Lake Could Become a Major Test of Intel’s Hybrid Manufacturing Strategy #
Intel’s reported decision to combine 18A, TSMC N2P, and eventually N2X across Nova Lake and Razor Lake represents a notable evolution in its manufacturing model.
At the product level, Nova Lake is shaping up to be an ambitious generation, with a rumored 52-core flagship, up to 288 MB of cache, and a new bLLC architecture designed to challenge AMD’s cache-heavy X3D processors.
At the manufacturing level, however, the more important story may be Intel’s growing reliance on TSMC’s leading-edge capacity.
If the reports prove accurate, Intel will be competing directly with AMD and other major chip designers for increasingly valuable 2nm production resources.
The ultimate question is whether Intel can use this hybrid manufacturing strategy to deliver enough Nova Lake and Razor Lake processors without sacrificing cost, supply stability, or its long-term 18A roadmap.
For AMD, the answer may matter just as much: every wafer allocated to Intel at TSMC is potentially one less unit of advanced capacity available in an increasingly supply-constrained market.