Introduction to the 4 Types of PCIe Bus Resets
The PCI Express (PCIe) specification defines four reset mechanisms:
- Cold Reset
- Warm Reset
- Hot Reset
- Function Level Reset (FLR)
The first three are collectively referred to as Conventional Resets, introduced in early PCIe revisions. FLR was added later in PCIe 2.0 to provide finer-grained software control.
Understanding their differences is essential for system bring-up, driver development, and fault recovery.
🔌 Conventional Reset #
Conventional resets include:
- Cold Reset
- Warm Reset
- Hot Reset
Cold and Warm resets are categorized as Fundamental Resets, while Hot Reset is an In-band Reset.
A Fundamental Reset initializes:
- Device state machines
- Internal hardware logic
- Port states
- Configuration registers
However, sticky registers are excluded. These registers retain their values when auxiliary power ($V_{aux}$) remains present, even if main power is removed.
Cold Reset #
A Cold Reset occurs when main power is applied to the device.
Typical scenarios:
- System power-on
- Full power cycle
- Removing and reinserting a PCIe card (with power removed)
This reset ensures the entire device starts from a clean hardware state.
Warm Reset #
A Warm Reset occurs without removing system power.
Common triggers:
- Pressing a hardware reset button
- Platform-level reset logic
- Power controller toggling
POWERGOOD
The device remains powered, but internal logic is reset.
How Fundamental Resets Are Generated #
1️⃣ PERST# Sideband Signal
A dedicated active-low reset signal (PCI Express Reset) distributed across the platform.
2️⃣ Autonomous Reset
Some devices internally generate a fundamental reset when detecting valid main power.
Both mechanisms result in a full device-level reinitialization.
Hot Reset (In-band Reset) #
Unlike Fundamental Resets, a Hot Reset is transmitted through the PCIe link itself.
Key Characteristics: #
- Propagated via TS1 Ordered Sets
- Initiated upstream (Root Complex or Switch)
- Travels downstream through the fabric
Software Trigger #
Software writes 1 to the Secondary Bus Reset bit in the Bridge Control Register of a Root Port or Switch Port.
Device Behavior #
Upon receiving the Hot Reset:
- The LTSSM (Link Training and Status State Machine) enters
Recovery - Transitions to
Hot Reset - Moves to
Detect - Restarts link training
Hot Reset reinitializes:
- Device logic
- Non-sticky configuration registers
However, it does not remove power from the device.
🧩 Function Level Reset (FLR) #
Function Level Reset (FLR) provides reset capability at the individual function level.
This is especially important for:
- Multi-Function PCIe Devices
- SR-IOV virtual functions
- High-availability systems
Instead of resetting the entire device, FLR targets a single function.
How FLR Works #
- Software writes
1to the Initiate Function Level Reset bit in the Device Control Register. - The function must complete reset within 100ms.
Scope of FLR #
FLR resets:
- Internal state machines
- Function-specific configuration registers
- Function logic
FLR does not reset:
- Sticky bits
- Hardware-initialized registers
- PCIe link state
The physical link remains active and unaffected.
📊 Reset Type Comparison #
| Reset Type | Category | Trigger Mechanism | Scope |
|---|---|---|---|
| Cold | Conventional / Fundamental | Power cycle | Entire device |
| Warm | Conventional / Fundamental | Hardware (PERST#) | Entire device |
| Hot | Conventional / In-band | Software (TS1 Ordered Sets) | Entire downstream link |
| FLR | Function Level | Software (Register write) | Single function only |
🎯 Practical Engineering Perspective #
- Use Cold Reset for full hardware reinitialization.
- Use Warm Reset for controlled platform reset without removing power.
- Use Hot Reset when reinitializing downstream devices from software.
- Use FLR for fine-grained driver-level recovery without disrupting other functions.
In modern data centers and embedded systems, FLR is particularly valuable for virtualization and high-availability architectures, where full device resets are too disruptive.
Understanding these reset types is fundamental for PCIe driver development, hardware validation, and debugging complex system-level failures.