AMD Helios AI Rack: MI455X, Zen 6 EPYC and Pensando
AMD is positioning Helios as its first fully integrated rack-scale AI computing platform and its most direct challenge yet to NVIDIA’s vertically integrated AI infrastructure. Announced for deployment in Microsoft Azure data centers, Helios combines AMD Instinct MI455X accelerators, 6th Gen EPYC Venice processors, Pensando networking, Infinity Fabric, and the ROCm software stack into a single AI infrastructure platform.
The architecture is designed around large-scale AI training and inference, with AMD targeting workloads ranging from trillion-parameter models to agentic AI services. The system also reflects AMD’s broader strategy of competing beyond individual GPUs by integrating compute, memory, networking, software, and rack-level infrastructure into one platform.
Third-party estimates cited in the source material put NVIDIA’s current data-center GPU market share above 95%, compared with approximately 4.5% for AMD. Analysts expect AMD’s integrated Helios strategy could allow it to capture a significantly larger share of the AI accelerator market over the medium to long term.
🏗️ Helios Combines AMD’s Full AI Hardware Stack #
AMD’s Helios strategy centers on three primary components:
- AMD Instinct MI455X GPU for AI acceleration
- 6th Gen AMD EPYC Venice CPU based on Zen 6
- AMD Pensando AI networking for scale-up and scale-out communication
The broader platform also incorporates AMD Pensando DPUs, Infinity Fabric interconnects, UALink-based networking technologies, and ROCm.
This integration allows AMD to address the entire AI infrastructure stack rather than competing solely on accelerator specifications.
AMD Instinct MI455X #
The Instinct MI455X is the primary compute accelerator inside the Helios rack. Based on AMD’s CDNA 5 architecture, the MI455X introduces substantially higher compute throughput and memory bandwidth compared with the previous-generation MI350 series.
Key characteristics include:
- 40 PFLOPS of FP4 compute
- 20 PFLOPS of FP8 compute
- 432GB of HBM4 memory
- 19.6TB/s of memory bandwidth
- Support for open rack-scale networking technologies including UALoE, UAL, and UEC
AMD’s Instinct MI400 family consists of the MI455X, MI450X, and MI430X. The MI455X and MI450X target large-scale AI training and inference, while the MI430X is designed more heavily around HPC and sovereign AI workloads.
The MI430X also emphasizes FP64 performance and heterogeneous CPU-GPU computing while retaining the HBM4 memory technology used by the higher-end accelerators.
AMD Instinct generational comparison #
| Specification | Instinct MI300X | Instinct MI350X | Instinct MI455X |
|---|---|---|---|
| Architecture | CDNA 3 | CDNA 4 | CDNA 5 |
| FP8 Compute | 2.6 PFLOPS | 10 PFLOPS | 20 PFLOPS |
| FP4 Compute | — | 20 PFLOPS | 40 PFLOPS |
| Memory Technology | HBM3 | HBM3e | HBM4 |
| Memory Capacity | 192GB | 288GB | 432GB |
| Memory Bandwidth | 5.3TB/s | 8.0TB/s | 19.6TB/s |
The move to HBM4 increases both capacity and bandwidth significantly. Compared with the 288GB HBM3e configuration of the MI350X, the MI455X provides 50% more memory capacity and more than twice the memory bandwidth.
6th Gen AMD EPYC Venice #
The second major compute element is AMD’s 6th Gen EPYC processor, codenamed Venice and based on the Zen 6 architecture.
Venice is designed for high-performance server workloads where CPU throughput, memory bandwidth, and power efficiency remain important even in GPU-heavy AI systems. AMD has positioned the processor specifically for increasingly complex agentic AI infrastructure, where CPUs continue to handle orchestration, preprocessing, scheduling, networking, and other supporting workloads around accelerator execution.
The processor is expected to use TSMC’s 2nm manufacturing technology, which adopts Gate-All-Around nanosheet transistor technology.
Compared with previous FinFET generations, the 2nm process is designed to provide:
- 10%–15% higher performance at equivalent power.
- 25%–30% lower power consumption at equivalent performance.
- Up to 15% higher transistor density.
AMD has previewed Venice configurations featuring up to eight compute chiplets and two large I/O chiplets, with up to 256 cores and 512 threads.
AMD EPYC generational comparison #
| Specification | 4th Gen Genoa/Bergamo | 5th Gen Turin | 6th Gen Venice |
|---|---|---|---|
| Architecture | Zen 4 / Zen 4c | Zen 5 / Zen 5c | Zen 6 / Zen 6c |
| Process Node | TSMC 5nm/4nm | TSMC 4nm/3nm | TSMC 2nm |
| Maximum Cores/Threads | 128C / 256T | 192C / 384T | 256C / 512T |
| Memory Channels | 12-channel DDR5 | 12-channel DDR5 | 16-channel DDR5 |
| PCIe Support | PCIe 5.0 | PCIe 5.0 | PCIe 6.0 |
The CPU is particularly important for agentic AI infrastructure because large AI systems increasingly require substantial host-side processing in addition to accelerator compute.
🌐 Pensando Networking Connects the Helios Rack #
AI performance at rack scale depends heavily on communication bandwidth and latency. AMD therefore integrates Pensando networking technologies into Helios to handle both accelerator communication and data-center traffic.
The architecture includes the Pensando Vulcano 800G AI SmartNIC and Salina DPU, positioning AMD against NVIDIA’s ConnectX networking and BlueField DPU products.
Pensando Vulcano 800G AI SmartNIC #
The Vulcano SmartNIC provides up to 800Gbps of Ethernet throughput per card and is designed for large-scale AI cluster networking.
AMD’s architecture combines Vulcano with UAL-based interconnects and PCIe 6.0 host connectivity. The platform also supports Ultra Ethernet Consortium standards and RDMA over Converged Ethernet, technologies intended to maintain efficient communication across large AI clusters.
The architecture is designed to provide substantially greater GPU-to-GPU bandwidth than previous generations while maintaining programmable networking capabilities.
UALoE scale-up interconnect #
Within the rack, Helios uses an open networking architecture based on UALink over Ethernet, or UALoE.
The design enables direct, high-bandwidth communication between GPUs and supports non-blocking connectivity for up to 72 accelerators in a fully configured rack.
This scale-up fabric is critical for distributed training because model parameters, activations, gradients, and other tensors must move rapidly between accelerators.
Pensando Salina DPU #
The Salina DPU handles infrastructure processing that would otherwise consume CPU resources, including networking, storage, security, and encryption workloads.
The DPU incorporates 16 Arm N1 cores and is designed to offload data-center infrastructure tasks from the primary compute processors.
According to the specifications provided for the platform, Salina offers:
- 40% higher performance than CPU-only processing for targeted workloads.
- 2x the compute capability of AMD’s previous-generation DPU.
- 40% higher overall performance than NVIDIA’s BlueField-3 DPU.
Offloading these infrastructure operations allows the main CPU and GPU resources to remain focused on application and AI workloads.
⚡ Helios Rack Delivers Multi-Exaflop AI Compute #
Helios follows the widened rack specification submitted by Meta to the Open Compute Project and uses a full liquid-cooling architecture.
A complete rack contains 18 compute trays and six switches. Each compute tray includes four MI455X GPUs and one Zen 6 EPYC Venice processor, resulting in a total of 72 GPUs per rack.
Each accelerator is paired with a dedicated liquid-cooling cold plate to manage the thermal output generated by the high-density compute configuration.
Physical and power characteristics #
The reported rack-level specifications include:
- Rack weight: Approximately 5,000 pounds (2,268kg)
- Estimated procurement cost: $5.0 million–$5.5 million
- Power consumption: Approximately 225kW–245kW
- GPU count: 72 MI455X accelerators
At this scale, power delivery and thermal management become fundamental infrastructure requirements rather than secondary considerations. The liquid-cooled rack is designed to sustain the high thermal density associated with dozens of high-performance accelerators operating simultaneously.
Aggregate Helios compute specifications #
The fully populated rack is specified to deliver:
- FP4 peak compute: 2.9 EFLOPS
- FP8 peak compute: 1.4 EFLOPS
- Total HBM4 capacity: 31TB
- Aggregate memory bandwidth: 1.4PB/s
- Scale-out network bandwidth: 43TB/s
- Scale-up interconnect bandwidth: 260TB/s
- Total CPU cores: Approximately 4,600
- GPU compute units: Approximately 18,000
These resources are intended to support extremely large AI models, including trillion-parameter-class workloads, while providing sufficient memory capacity and interconnect bandwidth for distributed execution.
💻 ROCm Provides the Software Foundation #
Hardware integration is only one part of AMD’s Helios strategy. ROCm provides the software layer that connects the accelerators, frameworks, libraries, and development tools required to deploy AI workloads at scale.
AMD positions ROCm as an open alternative to NVIDIA’s CUDA ecosystem, with support spanning major machine learning and AI infrastructure frameworks.
For Helios, the supported software ecosystem includes:
- PyTorch
- TensorFlow
- JAX
- Hugging Face
- vLLM
- SGLang
- DeepSpeed
- ONNX
- llm-d
- OpenXLA
- MLIR
- Llama Stack
The breadth of framework support is particularly important for hyperscale deployments because operators need to migrate existing AI workloads without rebuilding entire software environments around a new accelerator platform.
For AMD, ROCm maturity will therefore be one of the most important factors determining whether Helios can translate its hardware specifications into sustained real-world performance.
☁️ Microsoft Azure Becomes a Major Helios Deployment Platform #
Microsoft announced plans to deploy AMD Helios systems across Azure data centers, making the platform a significant component of AMD’s push into hyperscale AI infrastructure.
Microsoft plans to introduce several Azure virtual machine configurations built around AMD’s latest server hardware.
Azure HDv2 #
The CPU-optimized HDv2 instances are designed around 6th Gen EPYC processors and provide nearly 500 CPU cores per instance, alongside:
- Up to 4TB of system memory
- 32TB of local NVMe storage
- 400Gbps Azure Boost networking
Azure HXv2 #
HXv2 targets agentic AI and high-performance CPU workloads. Configurations are expected to include 176 EPYC cores per VM with 3D V-Cache, clock speeds exceeding 5GHz, increased cache capacity, and between 2TB and 4TB of memory.
The instances also support 800Gbps InfiniBand connectivity for demanding distributed workloads.
ND MI455X v7 #
The ND MI455X v7 configuration represents the direct Helios rack-scale offering, combining 72 MI455X GPUs with 6th Gen EPYC processors.
This configuration is aimed at large-scale AI training and inference where accelerator density, HBM capacity, and high-bandwidth interconnects are critical.
🤝 Helios Expands AMD’s AI Customer Base #
Microsoft is not the only major organization associated with AMD’s next-generation AI hardware.
AMD has identified a number of major customers and partners for Helios, EPYC Venice, and MI455X products, including OpenAI, Meta, Oracle, HPE, TCS, Celestica, Nutanix, and the U.S. Department of Energy.
The breadth of these relationships reflects AMD’s attempt to establish a complete alternative AI infrastructure ecosystem rather than relying solely on accelerator sales.
📈 Helios Could Reshape the AI Accelerator Market #
The significance of Helios extends beyond its individual hardware specifications. AMD is attempting to challenge NVIDIA at the rack level, where compute accelerators, CPUs, networking, memory, software, cooling, and system integration increasingly determine the economics of AI infrastructure.
NVIDIA currently maintains a dominant position in data-center AI accelerators, but hyperscalers are increasingly interested in supplier diversification as AI infrastructure spending continues to expand.
AMD’s advantage is that it can combine its GPU, CPU, networking, interconnect, and software portfolios into a unified system. If Helios reaches production on schedule and ROCm delivers reliable performance in large-scale deployments, AMD could offer hyperscalers a substantially more complete second-source alternative to NVIDIA.
The deployment of Helios in Azure is therefore strategically important. Real-world performance, software stability, total cost of ownership, power efficiency, and supply capacity will ultimately determine whether AMD can convert its technical roadmap into meaningful market share.
If successful, Helios could accelerate the transition of AI infrastructure from a predominantly single-vendor market toward a more competitive multi-supplier ecosystem, giving hyperscalers additional leverage over pricing, procurement, and long-term platform strategy.