Intel Nova Lake-S 28-Core CPU Reportedly Hits 296W PL1
Recent leaks surrounding Intel’s upcoming Nova Lake-S desktop processors point to surprisingly aggressive power targets for high-end models equipped with Intel’s bLLC (Big Last-Level Cache) technology.
The most notable configuration is a 28-core single-compute-tile processor reportedly rated at a 296W PL1 power level. If accurate, that would be dramatically higher than the conventional 125W desktop CPU baseline many users might expect, suggesting that Intel is prioritizing maximum performance even at the cost of substantially greater power consumption and cooling requirements.
The leaked specifications also point to 144MB of bLLC, 24 PCIe Gen5 lanes, and an integrated Xe3 graphics configuration, positioning the chip as one of the more ambitious Nova Lake-S desktop designs.
🧩 28-Core Nova Lake-S Configuration #
The leaked 28-core configuration reportedly combines three types of CPU cores on a single compute tile:
- 8 Cove P-cores for high-performance workloads
- 16 Arctic Wolf E-cores for efficient multi-threaded processing
- 4 LP-E cores for lower-power background workloads
- 144MB of bLLC for a large shared last-level cache
- 24 PCIe Gen5 lanes for high-speed expansion and storage
- 2 Xe3 GPU cores for integrated graphics
This heterogeneous architecture continues Intel’s strategy of combining different core types rather than relying exclusively on conventional performance cores.
The bLLC cache is particularly significant. With 144MB available at the package level, Intel appears to be positioning the technology as a direct competitor to AMD’s cache-heavy X3D processors, which use 3D V-Cache to increase effective cache capacity and improve performance in latency-sensitive workloads.
🔥 296W PL1 Could Make Cooling a Major Concern #
The most eye-catching figure in the leak is the reported 296W PL1 rating for the single-tile 28-core model.
PL1 traditionally represents a sustained power target rather than a brief boost value. If the reported number is accurate and reflects the final platform configuration, the processor could operate at nearly 2.4 times a 125W baseline under sustained workloads.
That would fundamentally change the cooling requirements for a mainstream desktop socket.
High-end users could need substantial cooling hardware, potentially including:
- Premium 360mm or 420mm AIO liquid coolers
- High-performance custom liquid cooling loops
- Robust motherboard VRM designs
- Cases with strong airflow and high thermal capacity
The actual thermal requirements will ultimately depend on Intel’s final voltage, frequency, power-management behavior, and retail firmware. Engineering-sample specifications can also differ significantly from production settings.
⚡ Dual-Tile Models Could Push Power Even Higher #
The reported 296W figure applies to the single-compute-tile 28-core configuration. Other Nova Lake-S variants are expected to use multiple compute tiles.
According to the leak, dual-tile configurations could reach up to 474W PL2 under peak conditions.
That does not necessarily mean a retail processor will continuously consume 474W. PL2 is associated with higher short-term power behavior, and actual workloads, firmware limits, cooling, and motherboard settings can all affect real-world consumption.
Nevertheless, the figure illustrates how aggressively Intel may be scaling the performance envelope of its highest-end Nova Lake processors.
🎮 bLLC Targets AMD’s X3D Gaming Advantage #
Intel’s large bLLC implementation could be one of the most important architectural features of Nova Lake-S.
AMD’s X3D processors have established a strong position in gaming by increasing cache capacity through 3D-stacked cache. Large caches can reduce the need to access slower system memory, particularly in workloads that repeatedly access relatively small datasets.
Intel’s bLLC approach appears designed to attack the same performance characteristic from a different architectural direction.
A 144MB shared cache could potentially benefit gaming workloads, simulation software, development environments, and other applications that are sensitive to memory latency and cache capacity.
However, cache size alone does not determine performance. Clock speeds, memory latency, core architecture, scheduling, interconnect behavior, and software optimization will all influence the final result.
🖥️ Designed for Enthusiasts and Heavy Workloads #
The leaked configuration appears targeted at the upper end of the desktop market rather than mainstream systems.
Its combination of 28 cores, 144MB bLLC, high PCIe connectivity, and aggressive power limits could make it attractive to users running demanding workloads such as:
- 3D rendering
- Video production
- Software compilation
- Scientific and engineering workloads
- Local AI inference
- High-end gaming
- Multi-tasking and workstation applications
The major trade-off is likely to be efficiency. A processor capable of sustaining nearly 300W at the reported PL1 level could deliver impressive absolute performance while substantially increasing energy consumption and thermal output.
🏁 Nova Lake-S Could Trade Efficiency for Performance #
The reported specifications suggest that Intel may be pursuing a straightforward strategy with its highest-end Nova Lake-S processors: push power limits aggressively to maximize performance.
The 28-core model’s reported 296W PL1 is especially notable because it would place cooling and platform power delivery among the most important considerations for buyers.
At the same time, the 144MB bLLC cache gives Intel another weapon against AMD’s X3D lineup, particularly in gaming and other cache-sensitive workloads.
It is important to emphasize that these figures remain leak-based information rather than confirmed retail specifications. Intel could change power limits, frequencies, core configurations, or cache configurations before launch.
If the reported numbers ultimately survive into production, however, Nova Lake-S could represent a major shift toward extremely high-power desktop CPUs—delivering more performance at the expense of efficiency, thermals, and system complexity.