DDR5 Surpasses HBM in Profitability as AI Inference Reshapes the Memory Market
Meta Description: DDR5 RDIMMs have overtaken HBM in profitability and wafer revenue as AI inference drives server memory demand, tightening DRAM supply and strengthening vendor pricing power.
The rapid expansion of AI infrastructure has transformed memory into one of the most strategic battlegrounds in the semiconductor industry. While High Bandwidth Memory (HBM) has captured most of the spotlight thanks to its critical role in AI accelerators, recent data suggests the industry’s profit dynamics are shifting.
According to TrendForce, DDR5 64GB RDIMM modules surpassed HBM in both per-wafer revenue and profitability during the first quarter of 2026. As AI deployments increasingly transition from training-focused workloads toward large-scale inference, demand for conventional server memory is rising rapidly, creating new growth opportunities for DRAM suppliers.
๐ DDR5 Overtakes HBM in Profitability #
Traditionally, HBM has been viewed as the most lucrative segment of the memory market due to its advanced packaging requirements, premium pricing, and tight supply conditions.
However, first-quarter 2026 contract negotiations altered the equation.
Strong demand for enterprise and cloud servers pushed DDR5 RDIMM pricing significantly higher, allowing DDR5 products to generate greater revenue and profitability per wafer than HBM during the quarter.
Several factors contributed to this shift:
- Accelerated deployment of DDR5 across hyperscale data centers
- Tight supply of advanced DRAM manufacturing capacity
- Growing demand from AI inference infrastructure
- Annual contract pricing adjustments favoring conventional server DRAM
As a result, memory vendors gained increased flexibility in allocating wafer capacity between HBM and traditional DRAM products.
๐ AI Inference Is Becoming the New Growth Engine #
The AI industry is entering a new phase.
While AI training remains a major consumer of advanced hardware, inference workloads are now expanding at an even faster pace. As organizations deploy AI applications to production environments, demand is shifting toward general-purpose servers capable of efficiently serving AI models at scale.
This transition has significant implications for memory demand.
Unlike dedicated AI training systems that rely heavily on HBM-equipped accelerators, inference clusters often require large quantities of:
- DDR5 RDIMMs
- Server LPDDR memory
- Conventional DRAM modules
Cloud service providers have been steadily increasing DDR5 deployment ratios since the second half of 2025, recognizing its balance of performance, power efficiency, and cost-effectiveness.
As a result, DDR5 has become one of the primary beneficiaries of the industry’s migration toward inference-centric infrastructure.
๐ฌ HBM4 Remains Critical for AI Accelerators #
Despite DDR5’s profitability gains, HBM remains indispensable for next-generation AI processors.
HBM4, expected to enter mass production during 2026, represents a major architectural leap.
Key improvements include:
| Specification | HBM3E | HBM4 |
|---|---|---|
| Interface Width | 1024-bit | 2048-bit |
| Bandwidth | Up to ~1 TB/s | Up to 2 TB/s |
| Data Rate | ~8 Gbps | Above 8 Gbps |
| Target Workloads | AI Training & Inference | Next-Generation AI Systems |
The doubling of interface width enables dramatically higher memory throughput, supporting increasingly complex AI models and larger context windows.
As AI systems continue scaling, HBM remains the preferred memory architecture for accelerators produced by NVIDIA, AMD, Google, and other major AI chip developers.
๐ฅ๏ธ NVIDIA, AMD, and Custom ASICs Will Drive HBM Demand #
Although memory economics temporarily favor DDR5, HBM demand remains on a steep upward trajectory.
2026: Custom AI ASIC Expansion #
The primary growth driver during 2026 is expected to be custom AI accelerators.
Hyperscalers are rapidly expanding their investments in proprietary chips, increasing HBM capacity requirements per processor.
Typical HBM allocations are expected to rise from:
- 96GB โ 216GB
- 192GB โ 288GB
depending on platform design and target workloads.
2027: Rubin Ultra and Next-Generation AI Platforms #
Demand is projected to accelerate further in 2027.
The arrival of NVIDIA’s Rubin Ultra architecture is expected to significantly increase memory requirements across AI clusters.
While the standard Rubin platform is expected to maintain HBM capacity levels similar to previous generations, Rubin Ultra is projected to raise HBM allocation to approximately:
384GB of HBM per GPU
At the same time, hyperscalers deploying custom ASICsโsuch as Google’s TPU familyโare expected to continue increasing deployment volumes, further driving HBM consumption.
โ ๏ธ The Growing DRAM Capacity Squeeze #
One of the most important trends emerging from the AI era is the growing competition for advanced DRAM manufacturing capacity.
The world’s three leading DRAM suppliers continue prioritizing advanced nodes for:
- HBM
- High-end server DDR5
- AI-focused memory products
As more wafer capacity is diverted toward HBM production, conventional DRAM supply becomes increasingly constrained.
Projected HBM Share of Total DRAM Production #
| Year | HBM Wafer Input Share | HBM Bit Supply Share |
|---|---|---|
| 2025 | ~18% | ~8% |
| 2026 | ~22% | ~9% |
| 2027 | ~30% | ~13% |
By 2027, nearly one-third of total DRAM wafer input is expected to be dedicated to HBM production.
This creates a classic crowding-out effect:
- Larger HBM die sizes consume more wafer capacity
- Advanced manufacturing nodes become increasingly scarce
- Conventional DRAM supply growth slows
- Memory vendors gain stronger pricing leverage
As a result, tighter supply conditions may support higher contract prices across both HBM and traditional DRAM categories.
๐ก Why This Matters for the AI Industry #
The AI memory story is no longer solely about HBM.
The industry’s transition from training-centric deployments toward large-scale inference is creating a second growth engine centered on DDR5 and server DRAM.
HBM will remain the performance king for AI accelerators, particularly as platforms such as Rubin Ultra and custom AI ASICs continue increasing memory requirements. At the same time, the explosive growth of inference infrastructure is turning DDR5 into one of the most profitable segments of the memory market.
For memory manufacturers, the challenge over the next two years will be balancing capacity allocation between these two high-growth opportunities. For cloud providers and AI developers, memory availability may become just as important as GPU supply in determining how quickly next-generation AI services can scale.
The result is a memory market entering a new eraโone where DDR5 and HBM are no longer competitors, but complementary pillars supporting the rapid expansion of AI infrastructure worldwide.