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NVIDIA Rubin Ultra NVL576: 576 GPUs, CPO and 2027 Roadmap

NVIDIA Rubin Ultra NVL576: 576 GPUs, CPO and 2027 Roadmap

NVIDIA is preparing to expand AI computing beyond conventional single-rack systems with its upcoming Vera Rubin Ultra NVL576 platform. Outlined during the October 2026 Open Compute Project (OCP) Global Summit, the system is designed to connect 576 GPUs through next-generation NVLink and co-packaged optics (CPO), creating a unified multi-rack computing domain for extremely large AI workloads.

According to NVIDIA’s roadmap, Rubin Ultra NVL576 is planned for 2027 and targets AI models with up to 10 trillion parameters. The architecture combines high-density GPU compute, high-bandwidth memory, liquid-cooled infrastructure, and optical interconnects to address the communication and scaling challenges associated with increasingly large models.

The announcement reflects a broader shift in AI infrastructure design. Instead of treating individual GPUs or standalone server racks as the primary unit of computing capacity, NVIDIA is moving toward interconnected, rack-scale and multi-rack systems engineered to operate as coordinated computing platforms.

NVIDIA’s OCP Global Summit 2026 program featured Ian Buck, vice president of hyperscale and high-performance computing, discussing the company’s approach to open infrastructure and large-scale AI systems.

🚀 Rubin Ultra NVL576: Building a 576-GPU Compute Domain
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The defining feature of Rubin Ultra NVL576 is its ability to connect 576 GPUs through a high-speed NVLink fabric that extends across multiple racks.

The description “giant GPU” refers to this unified computing domain, not a single physical silicon die. The system distributes its accelerators across multiple racks and uses high-bandwidth interconnects to coordinate GPU-to-GPU communication.

This design targets AI workloads that require substantial aggregate compute capacity, large memory pools, and efficient exchange of intermediate data between accelerators.

Reported Platform Specifications
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Specification Reported Details
Platform NVIDIA Vera Rubin Ultra NVL576
Accelerator count 576 GPUs
Planned availability 2027 roadmap
Target model scale Up to 10 trillion parameters
Scale-up interconnect Next-generation NVLink 7
Optical technology Co-Packaged Optics (CPO)
GPU architecture Rubin Ultra
Memory technology HBM4E
Reported system HBM capacity Approximately 365TB
Reported scale-up bandwidth Up to 4.6 PB/s in NVIDIA’s roadmap presentation
Reported FP4 inference performance 15 exaflops
Reported FP8 training performance 5 exaflops
Cooling Liquid-cooled rack infrastructure

These figures describe the announced roadmap and reported specifications, not independently verified retail-system benchmarks. Performance also depends on precision, workload characteristics, software implementation, and the configuration used for comparison.

NVIDIA has presented the platform as a major performance increase over the Blackwell GB300 NVL72 generation. The company has cited approximately 14-fold gains in its reported comparisons, although individual performance ratios depend on the metrics and configurations being compared.

Why 576 GPUs Matter for Large AI Models
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Modern AI workloads increasingly distribute computation across hundreds or thousands of accelerators. Large models can require substantial memory for parameters, activations, optimizer states, and intermediate results, while training and inference workloads generate significant communication traffic between GPUs.

Scaling the hardware alone is not sufficient. The interconnect must provide enough bandwidth and predictable communication latency to keep accelerators productive.

Rubin Ultra NVL576 is intended to address this problem by expanding NVLink connectivity beyond the boundaries of a conventional single-rack deployment.

For models approaching the 10-trillion-parameter scale, this could provide a larger, tightly interconnected computing environment for model-parallel execution, distributed inference, and other workloads that benefit from frequent data exchange.

However, the 10-trillion-parameter target should be understood as an intended workload capability, not a guarantee that every model of that size can be trained or served efficiently on the platform. Model architecture, numerical precision, memory requirements, and software optimization remain critical.

⚡ NVLink 7 and CPO Enable Multi-Rack Connectivity #

Co-packaged optics is one of the central technologies behind NVIDIA’s planned NVL576 architecture.

Traditional high-speed electrical connections become increasingly difficult to scale over longer distances as signaling rates rise. Signal loss, power consumption, and the need for electrical retiming create additional engineering constraints when expanding GPU connectivity across multiple racks.

CPO addresses these challenges by placing optical engines close to the switching silicon, shortening high-speed electrical paths before signals are converted into optical communications carried over fiber.

How CPO Changes AI Networking
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In a conventional architecture, electrical signals travel through circuit-board traces to separate optical transceiver modules before entering fiber. CPO integrates optical engines alongside the switch ASIC within a closely coupled package, reducing the distance electrical signals must travel.

This approach can help improve bandwidth density and energy efficiency while making longer-distance high-bandwidth connections more practical.

For Rubin Ultra NVL576, the reported NVLink 7 CPO switch tray provides the optical connectivity needed to link GPU resources distributed across multiple racks into one NVLink compute domain.

The architecture is not simply about increasing the number of GPUs connected together. It is about maintaining the bandwidth and communication efficiency required to operate them as a coordinated system.

For additional technical background, see Why NVIDIA Sees Co-Packaged Optics as the Future of AI Networking.

Distinguishing NVLink CPO From Ethernet CPO #

An important distinction is that not all CPO technologies within NVIDIA’s roadmap perform the same function.

NVIDIA’s Spectrum-X Ethernet Photonics platform uses CPO for scale-out networking between AI systems. The planned NVLink 7 CPO switch tray for Rubin Ultra targets scale-up connectivity between GPUs within a unified computing domain.

The technologies share the principle of integrating optical engines near switching silicon, but they serve different networking layers and workloads.

NVIDIA announced that Spectrum-X Ethernet Photonics had entered production in 2026. That milestone does not, by itself, establish that the specific NVLink 7 CPO switch tray intended for Rubin Ultra NVL576 is already in mass production.

The optical interconnect for NVL576 remains part of the platform’s planned 2027 deployment.

📊 Compute, Memory and Bandwidth: The Numbers Behind NVL576
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The scale of Rubin Ultra NVL576 is reflected in its reported compute and memory specifications.

NVIDIA’s roadmap presentation has cited 15 exaflops of FP4 inference performance and 5 exaflops of FP8 training performance. These are extremely large aggregate figures intended to describe performance across the connected system, rather than the output of an individual GPU.

The architectural objective is to combine that compute throughput with sufficient memory capacity and communication bandwidth to support increasingly demanding AI workloads.

HBM4E and Aggregate Memory Capacity
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The reported NVL576 configuration uses HBM4E, the next-generation high-bandwidth memory technology intended for NVIDIA’s Rubin Ultra accelerators.

Aggregate memory capacity matters because distributed models must keep parameters, intermediate tensors, and runtime state accessible while coordinating work across multiple GPUs.

The supplied specifications report approximately 365TB of total HBM capacity across the system. Some descriptions also cite up to 1TB of HBM4E for an individual accelerator package, but that figure should not be treated as a confirmed per-GPU capacity alongside the 365TB system total without clarification of the exact packaging and configuration. A literal 1TB on each of 576 GPUs would imply 576TB before other considerations.

The final memory configuration and its precise per-accelerator allocation should therefore be confirmed against NVIDIA’s published system specifications.

Scale-Up Bandwidth and Networking
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NVIDIA’s earlier roadmap presentation cited approximately 4.6 PB/s of scale-up bandwidth for Rubin Ultra. Other reported interconnect figures use different bandwidth definitions and aggregation methods, so they should not be compared directly without understanding the topology and measurement.

The platform also incorporates ConnectX-9 networking and Spectrum-family switching technology for communication beyond the NVLink scale-up domain.

In a large AI deployment, these networking layers perform complementary jobs:

  • NVLink scale-up: Enables high-bandwidth communication between GPUs inside the unified compute domain.
  • Optical scale-up links: Extend the GPU interconnect across racks where conventional electrical connections face practical limitations.
  • Ethernet or other scale-out networking: Connects the larger computing domain to external systems, storage resources, and other parts of an AI data center.

These layers must operate together to keep accelerators supplied with data and minimize the performance penalties associated with distributed execution.

For further context on NVIDIA’s full-stack AI infrastructure strategy, see NVIDIA GTC 2026: The Rise of the Token Factory Era.

🧊 Rack-Scale Design: Liquid Cooling and Modular Infrastructure
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Rubin Ultra NVL576 extends NVIDIA’s rack-scale computing strategy toward a larger multi-rack deployment.

At these densities, cooling, power distribution, serviceability, and network integration become fundamental elements of system performance. Hardware cannot be designed in isolation from the supporting infrastructure.

NVIDIA’s Vera Rubin platform uses liquid-cooled compute trays and modular rack architecture to accommodate the power density of next-generation accelerated computing systems.

The company’s broader roadmap also distinguishes between its Kyber-based NVL144 architecture and the multi-rack optical expansion planned for NVL576. The 576-GPU system should therefore be understood as a coordinated multi-rack domain rather than a single physical cabinet containing every accelerator.

Open Compute and Modular Rack Integration
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NVIDIA has contributed Vera Rubin rack and compute-tray designs to the Open Compute Project through its MGX architecture.

The objective is to establish a common development foundation for system manufacturers and infrastructure partners while improving interoperability, assembly, cooling integration, and serviceability.

The modular approach supports standardized power and cooling interfaces, configurable system components, and repeatable rack designs. Such characteristics become increasingly important when an AI deployment consists of multiple high-density racks that must work together as one computing platform.

DSX POD and Faster AI Infrastructure Deployment
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NVIDIA is also addressing the time and complexity required to deploy complete AI computing environments.

At GTC Berlin in October 2026, the company introduced its DSX POD reference design for AI factories. The system combines compute, networking, cooling, and other infrastructure in modular, factory-integrated units that can be validated before delivery.

According to NVIDIA’s DSX POD announcement, the approach can reduce deployment time at a prepared site from approximately six months to as little as 14 days.

This is a claim about the deployment process for pre-integrated AI factory infrastructure, not a guarantee that every NVL576 installation can be commissioned within two weeks. Site readiness, power capacity, cooling infrastructure, networking, and commissioning requirements remain important constraints.

Nevertheless, modular deployment could make it easier for organizations to expand AI capacity without managing every infrastructure component as an entirely bespoke installation.

🔬 What the 2027 Roadmap Means for AI Infrastructure
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Rubin Ultra NVL576 represents a shift in how large AI systems are designed, procured, and operated.

Instead of scaling primarily by adding individual accelerators or purchasing more self-contained racks, organizations can move toward larger connected domains built around coordinated compute, memory, network, cooling, and management systems.

That model has implications for both AI developers and data-center operators.

Training and Inference at Extreme Scale
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Large-scale model training requires more than aggregate floating-point throughput. The system must distribute parameters and activations, coordinate parallel execution, and move intermediate results without leaving substantial amounts of compute capacity idle.

A large NVLink domain could help reduce interconnect constraints for workloads that benefit from tightly coupled GPU communication.

Inference workloads can have different requirements. Serving very large models may involve distributing weights across many accelerators, coordinating requests, and efficiently managing available memory. High aggregate bandwidth and tightly integrated software can help improve throughput, but the results depend on workload-specific scheduling and implementation.

The NVL576 architecture is therefore relevant to both training and inference, although the degree of benefit will vary across model architectures.

Procurement Shifts Toward Complete AI Systems
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For infrastructure buyers, the practical deployment unit may increasingly become a fully integrated rack-scale or multi-rack solution rather than a collection of separately procured GPUs.

Such systems involve coordinated requirements for:

  • Accelerators, memory, and high-speed interconnects.
  • Rack power delivery and facility-level electrical capacity.
  • Liquid cooling and heat rejection.
  • Network topology, storage connectivity, and data movement.
  • Firmware, system management, monitoring, and workload orchestration.

This co-designed approach can simplify integration and improve predictability, but it also increases the importance of evaluating the complete system’s cost, energy consumption, utilization, and deployment requirements.

Organizations should consider total cost of ownership and useful output per unit of power rather than relying exclusively on peak compute specifications.

⚠️ What Remains Uncertain Before the 2027 Launch
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Although NVIDIA has outlined the intended direction for Rubin Ultra NVL576, the platform remains a roadmap product.

Several aspects require confirmation as hardware, networking, and system designs move toward deployment.

First, the final accelerator packaging and memory configuration need to be distinguished from preliminary figures. The reported per-GPU HBM capacity and total system memory should not be combined without reconciling their definitions.

Second, headline compute throughput does not translate directly into application performance. Actual results will depend on numerical precision, software kernels, interconnect utilization, scheduling, and model parallelism.

Third, the planned NVLink 7 CPO switch tray must be distinguished from Ethernet CPO products already in production. The existence of production CPO networking elsewhere in NVIDIA’s portfolio does not prove that every part of the NVL576 optical scale-up system is ready for volume deployment.

Finally, power delivery, cooling, manufacturing capacity, installation schedules, and system reliability will all influence the practical availability of the platform.

NVIDIA’s 2027 roadmap indicates its intended direction, but final specifications, delivery schedules, and third-party performance evaluations will be needed to establish the platform’s realized capabilities.

📝 Conclusion: NVIDIA Moves Toward Multi-Rack AI Computing Domains
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NVIDIA’s Rubin Ultra NVL576 is designed to connect 576 GPUs into a unified multi-rack computing domain using NVLink 7 and co-packaged optics. With a 2027 target and an intended workload scale of up to 10 trillion parameters, the platform represents a major expansion of NVIDIA’s rack-scale AI infrastructure strategy.

The system combines high aggregate compute throughput, HBM4E memory, optical interconnects, liquid-cooled hardware, and modular infrastructure. Its core objective is to maintain effective GPU coordination as AI workloads grow beyond the practical boundaries of conventional single-rack deployments.

For AI developers, the potential benefit is a larger and more tightly interconnected computing resource for demanding training and inference workloads. For infrastructure operators, the challenge shifts toward deploying and operating complete high-density systems with sufficient power, cooling, networking, and serviceability.

Rubin Ultra NVL576 remains a roadmap platform rather than a fully independently validated production system. Its final specifications and real-world performance will become clearer as NVIDIA approaches the planned 2027 deployment.

Even at this stage, the direction is clear: the future of large-scale AI computing depends not only on faster GPUs, but also on the interconnects, memory systems, and infrastructure that allow hundreds of accelerators to function as a coherent computing platform.

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