Xcena MX1: 2TB CXL Memory and 1,000+ RISC-V Cores 30 October 2026·3967 words·19 mins Xcena MX1 CXL Computational Memory RISC-V Ai Infrastructure Memory Expansion Near-Memory Computing Llm Inference Data Center Architecture
AMD Zen 6 IBS Memory Profiler: Linux Memory Tiering 10 October 2026·2552 words·13 mins AMD Zen 6 IBS Memory Profiler Linux Kernel CXL Memory Tiering NUMA AMD EPYC Performance Profiling
CXL Workloads: KV Cache, Memory Pooling, and Tiering 10 October 2026·3610 words·18 mins CXL Memory Tiering Llm Inference KV Cache Memory Pooling NUMA Linux Kernel Data Center Architecture
Intel's AI Memory Comeback: ZAM, XBM and 512GB Stacks 28 September 2026·1854 words·9 mins Intel AI Memory ZAM XBM HBM CXL DRAM NAND Linux Kernel Memory Hotplug
Understanding CXL Part 2: System Networking and Memory Ecosystem 22 September 2026·3620 words·18 mins CXL Compute Express Link CXL 3.0 CXL Memory Memory Pooling Data Center Server Memory LLM Infrastructure
CXL Explained: Protocols, Device Types, Versions, and Memory 22 September 2026·3965 words·19 mins CXL Compute Express Link Memory Data Center Ai Infrastructure HBM DDR5 Memory Pooling Semiconductors
Montage Technology CXL 3.2 MXC Enters Samsung and SK Hynix 3 September 2026·2564 words·13 mins Montage Technology CXL CXL 3.2 MXC PCIe 6.x PCIe Retimer Memory Pooling Ai Infrastructure Semiconductor
Why CXL Is Losing the AI Accelerator Interconnect Race 18 August 2026·1341 words·7 mins CXL AI Accelerators PCIe NVLink SerDes HBM Ai Infrastructure Interconnects
Marvell CXL Switch Enables 48TB AI Memory Pools 12 August 2026·2229 words·11 mins Marvell CXL Ai Infrastructure AI Memory PCIe 6.0 KV Cache Data Centers Hyperscalers
Meta Vistara: Reusing DDR4 Memory with CXL at Hyperscale 14 July 2026·1683 words·8 mins Meta CXL Data Centers Memory Tiering DDR4 Linux Kernel Ai Infrastructure Server Hardware
